Computers perform operations under the direction of a linear sequence of instructions, which may be supplied in the form of a computer program. Computer programs are commonly written in a high-level language, such as FORTRAN or "C". The instructions of the high-level computer program are then compiled into lower-level instructions, commonly know as macroinstructions, having a format which can be decoded. Alternatively, a computer program may be written directly as a series of macroinstructions. The Intel Architecture Instruction Set provides an example of a body of macroinstructions, and includes operation codes (opcodes) such as ADD, MOVE, PUSH and many more.
During execution of a computer program, macroinstructions are fetched from memory, and supplied to a decoder within a microprocessor, which decodes the macroinstructions into corresponding micro-instructions. A single macroinstruction may spawn a single micro-instruction, or a series of micro-instructions, depending on the number of execution unit and memory operations required by the operation code (opcode) of the macroinstruction. The micro-instructions are then issued to the various execution units within the microprocessor for execution.
While micro-instructions provide a low-level specification of operations to be performed by execution units, the specification of operands (also termed "operand specifiers") within some micro-instruction may require that additional operations be performed within execution units, so as to allow the micro-instruction to be executed. For example, the micro-instruction AH:=add (AH, BL) requires, prior to the actual adding operation, that the value in either the AH register or the BL register be shifted into alignment with the value in the other register. Register structures employed by Intel Architecture processors are described in the Pentium.TM. Processor User's Manual, Volume 3: Architecture and Programming Manual, 1994, Section 3.3.1, pages 3-8 to 3-10, which is available from Intel Corporation. In prior art microprocessors, a misalignment was detected and a shifting operation performed by shifting circuitry associated with, or incorporated within, an arithmetic logic unit (ALU) prior to performing the actual adding operation. Prior art microprocessors subjected all micro-instructions requiring an addition operation to scrutiny by this shifting circuitry.
At certain clock frequencies, an ALU may be able to perform an additional operation required by the specification of an operand within a micro-instruction, such as the shifting operation described above, together with the addition operation (ADD) in a single clock cycle, and without any performance penalties. However, as the frequency at which functional units operate is increased, it is desirable to simplify functional units, such as the ALU, so as to increase the overall performance of the processor. To achieve this simplification, it is desirable to limit the number of operations that any single functional unit performs, and to increase the granularity of these functional units.